module c17 ( N1, N2, N3, N6, N7, N22, N23 );
  input N1, N2, N3, N6, N7;
  output N22, N23;
  wire   n7, n8, n9, n10;

  AOI22_X2 U7 ( .A1(n10), .A2(n8), .B1(N3), .B2(N6), .ZN(N23) );
  INV_X4 U8 ( .A(N2), .ZN(n7) );
  INV_X2 U9 ( .A(N2), .ZN(n10) );
  INV_X4 U10 ( .A(N7), .ZN(n8) );
  NAND2_X2 U11 ( .A1(N1), .A2(N3), .ZN(n9) );
  OAI221_X2 U12 ( .B1(n7), .B2(N3), .C1(N6), .C2(n10), .A(n9), .ZN(N22) );
endmodule